Conventionally, a Built-in Self Test (BIST) circuit is incorporated into a memory device in a semiconductor integrated circuit, and a failure of the memory device is detected in a production test.
On the other hand, in the test, it is necessary that the BIST circuit generates all addresses of a memory to perform write operation and read operation. Therefore, in the case of the memory having the large number of words, or in the case of the large number of memories, unfortunately it takes a significantly long time to perform a simulation to check connection after the BIST circuit is inserted in a system logic.